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RF3140QuadBand GSM850/GSM 900/DCS/PCS Power Amp Module
RF3140
QUAD-BAND GSM850/GSM900/DCS/PCS POWER AMP MODULE
Pb-Free Product Package Style: Module (10 mm x 10 mm)
Features
Complete Power Control Solution Single 3.0V to 5.5V Supply Voltage +35dBm GSM Output Power at 3.5V +33dBm DCS/PCS Output Power at 3.5V 60% GSM and 55% DCS/PCS
DCS/PCS IN 1 BAND SELECT 2 TX ENABLE 3 VBATT 4 VREG 5 VRAMP 6 GSM850/GSM900 IN 7
VCC2 12 11 DCS/PCS OUT
10 VCC OUT
EFF
9 GSM850/GSM900 OUT 8 VCC2
10mmx10mm Package Size
Applications
3V Quad-Band GSM Handsets Commercial and Consumer Systems Portable Battery-Powered Equipment GSM850/EGSM900/DCS/PCS Products GPRS Class 12 Compatible Power StarTM Module
Functional Block Diagram
Product Description
The RF3140 is a high-power, high-efficiency power amplifier module with integrated power control. The device is self-contained with 50 input and output terminals. The power control function is also incorporated, eliminating the need for directional couplers, detector diodes, power control ASICs and other power control circuitry; this allows the module to be driven directly from the DAC output. The device is designed for use as the final RF amplifier in GSM850, EGSM900, DCS and PCS handheld digital cellular equipment and other applications in the 824MHz to 849MHz, 880MHz to 915MHz, 1710MHz to 1785MHz and 1850MHz to 1910MHz bands. On-board power control provides over 50dB of control range with an analog voltage input; and, power down with a logic "low" for standby operation.
Ordering Information
RF3140 RF3140 RF3140PCBA-41X Quad-Band GSM850/GSM900/DCS/PCS Power Amp Module Power Amp Module 5-Piece Sample Pack Fully Assembled Evaluation Board
Optimum Technology Matching(R) Applied
GaAs HBT GaAs MESFET InGaP HBT SiGe BiCMOS Si BiCMOS SiGe HBT GaAs pHEMT Si CMOS Si BJT GaN HEMT
RF MICRO DEVICES(R), RFMD(R), Optimum Technology Matching(R), Enabling Wireless ConnectivityTM, PowerStar(R), POLARISTM TOTAL RADIOTM and UltimateBlueTM are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. (c)2006, RF Micro Devices, Inc.
Rev A9 DS060217
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Absolute Maximum Ratings Parameter
Supply Voltage Power Control Voltage (VRAMP) Input RF Power Max Duty Cycle Output Load VSWR Operating Case Temperature Storage Temperature
Rating
-0.3 to +6.0 -0.3 to +1.8 +8.5 50 10:1 -20 to +85 -55 to +150
Unit
VDC V dBm % C C
Caution! ESD sensitive device.
Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied. RoHS status based on EUDirective2002/95/EC (at time of this document revision). The information in this publication is believed to be accurate and reliable. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice.
Parameter
Overall Power Control VRAMP
Power Control "ON" Power Control "OFF" VRAMP Input Capacitance VRAMP Input Current Turn On/Off Time
Min.
Specification Typ.
Max.
Unit
Condition
1.5 0.2 15 0.25 20 10 2 3.5 3.0 5.5 1 10 150
V V pF A s V V A mA V mA A
Max. POUT, Voltage supplied to the input Min. POUT, Voltage supplied to the input DC to 2MHz VRAMP =VRAMP MAX VRAMP =0.2V to VRAMP MAX Specifications Nominal operating limits PIN <-30dBm, TX Enable=Low, Temp=-20C to +85C VRAMP =0.2V, TX Enable=High TX Enable=High TX Enable=Low
Overall Power Supply
Power Supply Voltage Power Supply Current
VREG Voltage VREG Current
2.7
2.8 7 10
2.9 8
Overall Control Signals
Band Select "Low" Band Select "High" Band Select "High" Current TX Enable "Low" TX Enable "High" TX Enable "High" Current 0 1.9 0 1.9 0 2.0 20 0 2.0 1 0.5 3.0 50 0.5 3.0 2 V V A V V A
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Parameter
Overall (GSM850 Mode)
Operating Frequency Range Maximum Output Power +34.2 32 Total Efficiency Input Power Range Output Noise Power Forward Isolation 1 Forward Isolation 2 Cross Band Isolation at 2f0 Second Harmonic Third Harmonic All Other Non-Harmonic Spurious Input Impedance Input VSWR Output Load VSWR Stability Output Load VSWR Ruggedness Output Load Impedance 8:1 10:1 50 55 dB 50 2.5:1 45 0 824 to 849 +35.0 33 55 +3 -86 -35 -25 -30 -15 -30 +5 -84 -25 -10 -20 -5 -10 -36 MHz dBm dBm % dBm dBm dBm dBm dBm dBm dBm dBm VRAMP =0.2V to VRAMP MAX Spurious<-36dBm, RBW=3MHz Set VRAMP where VRAMP <34.2dBm into 50 load Load impedance presented at RF OUT pad VRAMP =0.2V to VRAMP MAX Temp = 25C, VBATT =3.5V, VRAMP =VRAMP MAX Temp=+85 C, VBATT =3.0V, VRAMP =VRAMP MAX At POUT MAX, VBATT =3.5V Maximum output power guaranteed at minimum drive level RBW=100kHz, 869MHz to 894MHz, POUT > +5dBm TXEnable=Low, 0V, PIN =+5dBm TXEnable=High, PIN =+5dBm, VRAMP =0.2V VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX
Min.
Specification Typ.
Max.
Unit
Condition
Temp=+25 C, VBATT =3.5V, VRAMP =VRAMP MAX, PIN =3dBm, VREG =2.8V, Freq=824MHz to 849MHz, 25% Duty Cycle, Pulse Width=1154s
Power Control VRAMP
Power Control Range Note: VRAMP MAX =3/8*VBATT +0.18<1.5V
Rev A9 DS060217
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Parameter
Overall (GSM900 Mode)
Operating Frequency Range Maximum Output Power +34.2 32 Total Efficiency Input Power Range Output Noise Power 52 0 880 to 915 +35.0 33 58 +3 -86 -88 Forward Isolation 1 Forward Isolation 2 Cross Band Isolation 2f0 Second Harmonic Third Harmonic All Other Non-Harmonic Spurious Input Impedance Input VSWR Output Load VSWR Stability Output Load VSWR Ruggedness Output Load Impedance 8:1 10:1 50 50 dB 50 2.5:1 -35 -25 -24 -15 -30 +5 -82 -84 -25 -10 -20 -5 -10 -36 MHz dBm dBm % dBm dBm dBm dBm dBm dBm dBm dBm dBm VRAMP =0.2V to VRAMP MAX Spurious<-36dBm, RBW=3MHz Set VRAMP where VRAMP <34.2dBm into 50 load Load impedance presented at RF OUT pad VRAMP =0.2V to VRAMP MAX Temp = 25C, VBATT =3.5V, VRAMP =VRAMP MAX Temp=+85 C, VBATT =3.0V, VRAMP =VRAMP MAX At POUT MAX, VBATT =3.5V Maximum output power guaranteed at minimum drive level RBW=100kHz, 925MHz to 935MHz, POUT > +5dBm RBW=100kHz, 935MHz to 960MHz, POUT > +5dBm TXEnable=Low, 0V, PIN =+5dBm TXEnable=High, VRAMP =0.2V, PIN =+5dBm VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX
Min.
Specification Typ.
Max.
Unit
Condition
Temp=+25 C, VBATT =3.5V, VRAMP =VRAMP MAX, PIN =3dBm, VREG =2.8V, Freq=880MHz to 915MHz, 25% Duty Cycle, Pulse Width=1154s
Power Control VRAMP
Power Control Range Note: VRAMP MAX =3/8*VBATT +0.18<1.5V
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Parameter
Overall (DCS Mode)
Operating Frequency Range Maximum Output Power +32 +29.5 Total Efficiency Input Power Range Output Noise Power Forward Isolation 1 Forward Isolation 2 Second Harmonic Third Harmonic All Other Non-Harmonic Spurious Input Impedance Input VSWR Output Load VSWR Stability Output Load VSWR Ruggedness Output Load Impedance 8:1 10:1 50 50 dB 50 2.5:1 48 0 1710 to 1785 +33 +31.0 55 +3 -85 -40 -20 -15 -30 +5 -80 -30 -10 -7 -15 -36 MHz dBm dBm % dBm dBm dBm dBm dBm dBm dBm VRAMP =0.2V to VRAMP MAX Spurious<-36dBm, RBW=3MHz Set VRAMP where VRAMP <34.2dBm into 50 load Load impedance presented at RF OUT pin VRAMP =0.2V to VRAMP MAX, PIN =+5dBm Temp=25C, VBATT =3.5V, VRAMP =VRAMP MAX Temp=+85C, VBATT =3.0V, VRAMP =VRAMP MAX At POUT MAX, VBATT =3.5V Maximum output power guaranteed at minimum drive level RBW=100kHz, 1805MHz to 1880MHz, POUT > 0dBm, VBATT =3.5V TXEnable=Low, 0V, PIN =+5dBm TXEnable=High, VRAMP =0.2V, PIN =0dBm to +5dBm VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX
Min.
Specification Typ.
Max.
Unit
Condition
Temp=25C, VBATT =3.5V, VRAMP =VRAMP MAX, PIN =3dBm, VREG =2.8V, Freq=1710MHz to 1785MHz, 25% Duty Cycle, pulse width=1154s
Power Control VRAMP
Power Control Range Note: VRAMP MAX =3/8*VBATT +0.18<1.5V
Rev A9 DS060217
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Parameter
Overall (PCS Mode)
Operating Frequency Range Maximum Output Power +32 +29.5 Total Efficiency Input Power Range Output Noise Power Forward Isolation 1 Forward Isolation 2 Second Harmonic Third Harmonic All Other Non-Harmonic Spurious Input Impedance Input VSWR Output Load VSWR Stability Output Load VSWR Ruggedness Output Load Impedance 8:1 10:1 50 50 dB 50 2.5:1 45 0 1850 to 1910 +33 +31.0 52 +3 -85 -40 -20 -15 -30 +5 -80 -30 -10 -7 -15 -36 MHz dBm dBm % dBm dBm dBm dBm dBm dBm dBm VRAMP =0.2V to VRAMP MAX Spurious<-36dBm, VRAMP =0.2V to VRAMP MAX, RBW=3MHz Set VRAMP where VRAMP <34.2dBm into 50 load Load impedance presented at RF OUT pin VRAMP =0.2V to VRAMP MAX, PIN =+5dBm Temp=25C, VBATT =3.5V, VRAMP =VRAMP MAX, 1850MHz to 1910MHz Temp=+85C, VBATT =3.0V, VRAMP =VRAMP MAX At POUT MAX, VBATT =3.5V Full output power guaranteed at minimum drive level RBW=100kHz, 1930MHz to 1990MHz, POUT > 0dBm, VBATT =3.5V TX_ENABLE=Low, PIN =+5dBm TXEnable=High, VRAMP =0.2V, PIN =+5dBm VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX VRAMP =0.2V to VRAMP MAX
Min.
Specification Typ.
Max.
Unit
Condition
Temp=25C, VBATT =3.5V, VRAMP =VRAMP MAX, PIN =3dBm, VREG =2.8V, Freq=1850MHz to 1910MHz, 25% Duty Cycle, pulse width=1154s
Power Control VRAMP
Power Control Range Note: VRAMP MAX =3/8*VBATT +0.18<1.5V
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RF3140
Pin 1 2 3 4 5 6 7 8 9 10 Function Description DCS/PCS IN RF input to the DCS/PCS band. This is a 50 input.
BAND SELECT
Allows external control to select the GSM or DCS/PCS bands with a logic high or low. A logic low enables the GSM bands, whereas a logic high enables the DCS/PCS bands. This signal enables the PA module for operation with a logic high. Once TX Enable is asserted the RF output level will increase to -20dBm. Power supply for the module. This should be connected to the battery. Regulated voltage input for power control function. (2.8V nom) Ramping signal from DAC. A simple RC filter may need to be connected between the DAC output and the VRAMP input depending on the baseband selected. RF input to the GSM bands. This is a 50 input. Controlled voltage input to driver stage for GSM bands. This voltage is part of the power control function for the module. This node must be connected to VCC out. RF output for the GSM bands. This is a 50 output. The output load line matching is contained internal to the package. Controlled voltage output to feed VCC2. This voltage is part of the power control function for the module. It cannot be connected to anything other than VCC2, nor can any component be placed on this node (i.e., decoupling capacitor). RF output for the DCS/PCS bands. This is a 50 output. The output load line matching is contained internal to the package. Controlled voltage input to DCS/PCS driver stage. This voltage is part of the power control function for the module. This node must be connected to VCC out.
Interface Schematic
TX ENABLE VBATT VREG VRAMP GSM850/GS M900 IN VCC2 GSM850/GS M900 OUT VCC OUT
11 12 Pkg Base
DCS/PCS OUT VCC2 GND
Rev A9 DS060217
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Package Drawing
5.400 TYP 6.000 TYP 6.800 TYP 7.400 TYP 8.200 TYP 8.275 TYP 8.800 TYP 9.600 TYP Pin 1 8.747 0.400 TYP 1.200 TYP 1.800 TYP 2.600 TYP 3.200 TYP 4.000 TYP 4.600 TYP
9.600 TYP 8.800 TYP 8.200 TYP 7.400 TYP 6.800 TYP 6.000 TYP 5.400 TYP 4.600 TYP 4.000 TYP 3.200 TYP 2.600 TYP 1.800 TYP 1.200 TYP 0.400 TYP 0.000 9.098 TYP 1.797 8.205 8.280 0.000
5.925 4.075
1.245 0.306
Pin 1
1.70 1.45
10.00 0.10
10.00 0.10
0.450 0.075
Pin Out
PIN #1 VCC2
DCS/PCS IN
DCS/PCS OUT
BAND SELECT
TX EN
VBATT
VCC OUT
10.0000
VREG
VRAMP
GSM850/GSM900 IN VCC 2
GSM850/GSM900 OUT
10.0000
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RF3140
Theory of Operation
Overview The RF3140 is a quad-band GSM850, EGSM900, DCS1800, and PCS1900 power amplifier module that incorporates an indirect closed loop method of power control. This simplifies the phone design by eliminating the need for the complicated control loop design. The indirect closed loop appears as an open loop to the user and can be driven directly from the DAC output in the baseband circuit. Theory of Operation The indirect closed loop is essentially a closed loop method of power control that is invisible to the user. Most power control systems in GSM sense either forward power or collector/drain current. The RF3140 does not use a power detector. A highspeed control loop is incorporated to regulate the collector voltage of the amplifier while the stage are held at a constant bias. The VRAMP signal is multiplied by a factor of 2.65 and the collector voltage for the second and third stages are regulated to the multiplied VRAMP voltage. The basic circuit is shown in the following diagram.
VBATT TX ENABLE VRAMP
H(s)
RF IN TX ENABLE
RF OUT
By regulating the power, the stages are held in saturation across all power levels. As the required output power is decreased from full power down to 0dBm, the collector voltage is also decreased. This regulation of output power is demonstrated in Equation 1 where the relationship between collector voltage and output power is shown. Although load impedance affects output power, supply fluctuations are the dominate mode of power variations. With the RF3140 regulating collector voltage, the dominant mode of power fluctuations is eliminated.
P dBm
( 2 V CC - V SAT ) = 10 log ------------------------------------------- (Eq. 1) -3 8 R LOAD 10
2
There are several key factors to consider in the implementation of a transmitter solution for a mobile phone. Some of them are: * * * * * * * * * * * Effective efficiency (eff) Current draw and system efficiency Power variation due to Supply Voltage Power variation due to frequency Power variation due to temperature Input impedance variation Noise power Loop stability Loop bandwidth variations across power levels Burst timing and transient spectrum trade offs Harmonics
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Talk time and power management are key concerns in transmitter design since the power amplifier has the highest current draw in a mobile terminal. Considering only the power amplifier's efficiency does not provide a true picture for the total system efficiency. It is important to consider effective efficiency which is represented by EFF. (EFF considers the loss between the PA and antenna and is a more accurate measurement to determine how much current will be drawn in the application). EFF is defined by the following relationship (Equation 2):
m
PN - PIN
-------------------------------- 100 (Eq. 2) EFF = n = 1 P DC
Where Pn is the sum of all positive and negative RF power, PIN the input power and PDC is the delivered DC power. In dB the formula becomes (Equation 3):
10 - 10 EFF = ------------------------------------------------ (Eq. 3) V BAT I BAT 10
Where PPA is the output power from the PA, PLOSS the insertion loss, PIN the input power to the PA and PDC the delivered DC power. The RF3140 improves the effective efficiency by minimizing the PLOSS term in the equation. A directional coupler may introduce 0.4dB to 0.5dB loss to the transit path. To demonstrate the improvement in effective efficiency consider the following example: Conventional PA Solution at F=1785MHz:
P PA + P LOSS ----------------------------10
P IN ------10
PPA = +33.5 dBm PIN = +3 dBm PLOSS = -0.4 dB VBAT = 3.5 V IBAT = 1.16 A
RF3140 Solution:
EFF = 50.3%
PPA = +33.5 dBm PIN = +3 dBm PLOSS = 0 dB VBAT = 3.5 V IBAT = 1.16 A
hEFF = 55.16%
The RF3140 solution improves effective efficiency by 5%. Output power does not vary due to supply voltage under normal operating conditions if VRAMP is sufficiently lower than VBATT. By regulating the collector voltage to the PA the voltage sensitivity is essentially eliminated. This covers most cases where the PA will be operated. However, as the battery discharges and approaches its lower power range the maximum output power from the PA will also drop slightly. In this case it is important to also decrease VRAMP to prevent the power control from inducing switching transients. These transients occur as a result of the control loop slowing down and not regulating power in accordance with VRAMP.
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The switching transients due to low battery conditions are regulated by incorporating the following relationship limiting the maximum VRAMP voltage (Equation 4). Although no compensation is required for typical battery conditions, the battery compensation required for extreme conditions is covered by the relationship in Equation 4. This should be added to the terminal software.
3 V RAMP -- V CC + 0.18 (Eq. 4) 8
Due to reactive output matches, there are output power variations across frequency. There are a number of components that can make the effects greater or less. The components following the power amplifier often have insertion loss variation with respect to frequency. Usually, there is some length of microstrip that follows the power amplifier. There is also a frequency response found in directional couplers due to variation in the coupling factor over frequency, as well as the sensitivity of the detector diode. Since the RF3140 does not use a directional coupler with a diode detector, these variations do not occur. Input impedance variation is found in most GSM power amplifiers. This is due to a device phenomena where CBE and CCB (CGS and CSG for a FET) vary over the bias voltage. The same principle used to make varactors is present in the power amplifiers. The junction capacitance is a function of the bias across the junction. This produces input impedance variations as the Vapc voltage is swept. Although this could present a problem with frequency pulling the transmit VCO off frequency, most synthesizer designers use very wide loop bandwidths to quickly compensate for frequency variations due to the load variations presented to the VCO. The RF3140 presents a very constant load to the VCO. This is because all stages of the RF3140 are run at constant bias. As a result, there is constant reactance at the base emitter and base collector junction of the input stage to the power amplifier. Noise power in PA's where output power is controlled by changing the bias voltage is often a problem when backing off of output power. The reason is that the gain is changed in all stages and according to the noise formula (Equation 5),
F2 - 1 F3 - 1 F TOT = F1 + --------------- + ------------------- (Eq. 5) G1 G1 G2
the noise figure depends on noise factor and gain in all stages. Because the bias point of the RF3140 is kept constant the gain in the first stage is always high and the overall noise power is not increased when decreasing output power. Power control loop stability often presents many challenges to transmitter design. Designing a proper power control loop involves trade-offs affecting stability, transient spectrum and burst timing. In conventional architectures the PA gain (dB/ V) varies across different power levels, and as a result the loop bandwidth also varies. With some power amplifiers it is possible for the PA gain (control slope) to change from 100dB/V to as high as 1000dB/V. The challenge in this scenario is keeping the loop bandwidth wide enough to meet the burst mask at low slope regions which often causes instability at high slope regions. The RF3140 loop bandwidth is determined by internal bandwidth and the RF output load and does not change with respect to power levels. This makes it easier to maintain loop stability with a high bandwidth loop since the bias voltage and collector voltage do not vary. An often overlooked problem in PA control loops is that a delay not only decreases loop stability it also affects the burst timing when, for instance the input power from the VCO decreases (or increases) with respect to temperature or supply voltage. The burst timing then appears to shift to the right especially at low power levels. The RF3140 is insensitive to a change in input power and the burst timing is constant and requires no software compensation.
Rev A9 DS060217
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Switching transients occur when the up and down ramp of the burst is not smooth enough or suddenly changes shape. If the control slope of a PA has an inflection point within the output power range or if the slope is simply too steep it is difficult to prevent switching transients. Controlling the output power by changing the collector voltage is as earlier described based on the physical relationship between voltage swing and output power. Furthermore all stages are kept constantly biased so inflection points are nonexistent. Harmonics are natural products of high efficiency power amplifier design. An ideal class "E" saturated power amplifier will produce a perfect square wave. Looking at the Fourier transform of a square wave reveals high harmonic content. Although this is common to all power amplifiers, there are other factors that contribute to conducted harmonic content as well. With most power control methods a peak power diode detector is used to rectify and sense forward power. Through the rectification process there is additional squaring of the waveform resulting in higher harmonics. The RF3140 address this by eliminating the need for the detector diode. Therefore the harmonics coming out of the PA should represent the maximum power of the harmonics throughout the transmit chain. This is based upon proper harmonic termination of the transmit port. The receive port termination on the T/R switch as well as the harmonic impedance from the switch itself will have an impact on harmonics. Should a problem arise, these terminations should be explored. The RF3140 incorporates many circuits that had previously been required external to the power amplifier. The shaded area of the diagram below illustrates those components and the following table itemizes a comparison between the RF3140 Bill of Materials and a conventional solution:
Component Power Control ASIC Directional Coupler Buffer Attenuator Various Passives Mounting Yield (other than PA) Total Conventional Solution $0.80 $0.20 $0.05 $0.05 $0.05 $0.12 $1.27 RF3140 N/A N/A N/A N/A N/A N/A $0.00
1 2 3 4 5 6 7
14 13 12 11 10 9 8
From DAC
*Shaded area eliminated with Indirect Closed Loop using RF3140
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RF3140
Application Schematic
DCS/PCS IN BAND SELECT TX ENABLE VBATT VREG VRAMP GSM850/GSM900 IN
50 strip
12 1 2 3 4 5 15 k** 10 11
50 strip
DCS/PCS OUT
50 strip
6 7 8 9
50 strip
GSM850/GSM900 OUT
** Used to filter noise and spurious from base band.
Evaluation Board Schematic
J2 DCS/PCS IN 50 strip R6* 180 VCC P1-1 C3 33 pF C2 22 F P1 1 VBAT + CON1
BAND SELECT C4 8.2 pF
(0.1 pF 50 V)
P2 1 GND CON1 12 1 11 50 strip J7 DCS/PCS OUT
TX ENABLE R3 100 k
2 3
VBAT VREG C1 10 nF
4 5 6 7
10
VCC
50 strip 9 8
J8 GSM OUT
VRAMP R4 100 k J3 GSM IN 50 strip R1 15 k
3140400 r-
*Should not be populated on the evaluation board. R7* 180 VCC
Rev A9 DS060217
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RF3140
Evaluation Board Layout
Board Size 2.0" x 2.0" Board Thickness 0.032", Board Material FR-4, Multi-Layer
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RF3140
PCB Design Requirements
PCB Surface Finish The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 3inch to 8inch gold over 180inch nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land and Solder Mask Pattern
A = 0.80 (mm) Sq. Typ. 8.39 (mm) Typ. 7.00 (mm) 5.60 (mm) 4.20 (mm) Typ. 2.81 (mm) 1.40 (mm) 0.00 Pin 1
A A A A A A A A A A A A
A = 0.80 (mm) Sq. Typ. B = 2.17 x 6.40 (mm) 8.39 (mm) Typ. 7.49 (mm) Typ. 6.60 (mm) 6.00 (mm) 5.20 (mm) 5.11 (mm) 3.30 (mm) 3.21 (mm) 2.41 (mm) 1.78 (mm) 0.98 (mm) 0.89 (mm) Typ. 7.00 (mm) Typ. 5.60 (mm) Typ. 4.20 (mm) Typ. 2.81 (mm) Typ. 1.40 (mm) Typ. 0.00 Pin 1
A A A A A A A A A A A A A A A A B A A A A A A A A A A A A A A A A A A A A A A A
4.20 (mm)
1.40 (mm) Typ.
1.40 (mm) Typ.
2.30 (mm) Typ.
7.51 (mm) Typ.
8.39 (mm) Typ.
2.79 (mm) Typ. 3.48 (mm) 4.19 (mm) Typ.
5.60 (mm) Typ.
Metal Land Pattern
Solder Mask Pattern
Figure 1. PCB Metal Land and Solder Mask Pattern (Top View)
Rev A9 DS060217
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7.00 (mm) Typ.
8.39 (mm) Typ.
0.00
0.00
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RF3140
Thermal Pad and Via Design The PCB land pattern has been designed with a thermal pad that matches the exposed die paddle size on the bottom of the device. Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern shown has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing strategies. The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results. .
1.40 (mm) Grid
Figure 2. Thermal Pad and Via Design (RFMD
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7628 Thorndike Road, Greensboro, NC 27409-9421 * For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Rev A9 DS060217

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